1. Field of the Invention
The present invention relates to a memory apparatus for a digital picture signal, the memory apparatus having a real time signal processing circuit in particular a hierarchical encoding circuit disposed in an IC circuit, a writing method thereof, and a reading method thereof.
2. Description of the Related Art
A hierarchical encoding process for generating picture signals in a plurality of hierarchical levels that differ in resolutions is known. In this process, a picture in a first hierarchical level, a picture in a second hierarchical level, a picture in a third hierarchical level, and so forth are formed in such a manner that the data in the first hierarchical level is a high resolution picture signal, the resolution of the data in the second hierarchical level is lower than the resolution of the data in the first hierarchical level, the resolution of the data in the third hierarchical level is lower than the resolution of the data in the second hierarchical level. In this process, a plurality of picture signals are transmitted through one transmission path (a communication path or a record medium). With picture monitors corresponding to the hierarchical levels on the receiving side, picture data can be reproduced.
More reality, they are video signals having different resolutions such as a standard resolution video signal, a high resolution video signal, a computer display picture data, and a lower resolution video signal (for searching a picture database at high speed). In addition to the variations of resolutions, the hierarchical encoding process can be applied to enlargement and reduction of pictures (namely, electronic zooming). The enlargement and reduction of pictures have been widely used for video game applications and so forth.
In the conventional hierarchical encoding process, when a picture signal in a first hierarchical level and a picture signal in a second hierarchical level whose pixels are ¼ of the picture signal in the first hierarchical level are formed, the picture signal in the first hierarchical level is thinned out to ¼ thereof so as to form the picture signal in the second hierarchical level. In addition, the picture signal in the second hierarchical level is interpolated so as to form an interpolation signal in the first hierarchical level. The difference between the interpolation signal in the first hierarchical level and the input picture signal is calculated so as to form a difference signal. The difference signal is transmitted. Thus, in the conventional hierarchical encoding process, the number of pixels of the difference signal is the same as the number of pixels of the input picture signal. In addition, the signal in the second hierarchical level is transmitted. Thus, the amount of data to be transmitted is larger than the amount of original data. When hierarchically structured data is written to a memory, the capacity of the memory should be increased. To solve such a problem, the inventors of the present invention have proposed another hierarchical encoding method that does not increase the amount of data to be transmitted.
However, when hierarchically structured picture data is written to a memory, another IC circuit that is a signal processing circuit for the hierarchical encoding process is required. Thus, the cost and space of the resultant circuit increase.